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Triton Row-Wise Softmax
Activation FunctionsGPU Programming
Medium

Implement stable softmax independently across each row of a two-dimensional CUDA tensor using Triton. For input value xr,cx_{r,c}xr,c​ in row rrr and column ccc, let CCC be the number of columns and jjj index columns. The row maximum mrm_rmr​ and normalized output yr,cy_{r,c}yr,c​ are:

mr=max⁡0≤j<Cxr,j.m_r=\max_{0\le j<C}x_{r,j}.mr​=0≤j<Cmax​xr,j​. yr,c=exr,c−mr∑j=0C−1exr,j−mr.y_{r,c}=\frac{e^{x_{r,c}-m_r}}{\sum_{j=0}^{C-1}e^{x_{r,j}-m_r}}.yr,c​=∑j=0C−1​exr,j​−mr​exr,c​−mr​​.

Complete only the empty kernel body; the supplied solve launcher is already implemented. The pointers identify the input and output buffers, row_stride is the input row stride in elements, n_cols is the row width, and BLOCK_SIZE is the compile-time padded width. Return no value; write normalized rows into the contiguous output tensor with the same shape and storage dtype as the input.

Examples

Input: x = [[1, 2, 3], [3, 2, 1]], dtype = float32

Output: [[0.090031, 0.244728, 0.665241], [0.665241, 0.244728, 0.090031]]

Explanation: Reversing a row reverses its probability order.

Input: x = [[-2, 0, 1, 4, -1]], dtype = float16

Output: [[0.0023, 0.016998, 0.046204, 0.928223, 0.006256]]

Input: x = [[8], [-3]], dtype = bfloat16

Output: [[1], [1]]

Hint 1

tl.max and tl.sum reduce values along a block axis.

Hint 2

tl.load supports a masked fallback value for padded columns.

Hint 3

tl.exp evaluates elementwise exponentials.

Requirements

  • Use Triton with float32 arithmetic for normalization.
  • Normalize each row independently without modifying the input.
  • Support padded input rows and write only valid output columns.

Constraints

  • x and out are separate CUDA tensors with equal shape, device, and float32, float16, or bfloat16 storage dtype.
  • Input values are finite; input columns and the output tensor are contiguous.
  • Valid matrices have zero or more rows and 1 through 65,536 columns.
  • The supplied launcher rejects invalid rank, column stride, or width and handles zero rows.
  • The supplied launcher converts bfloat16 through temporary float32 buffers.
Try Similar Problems
Masked Triton GELU KernelEasyFused Tiled Matmul and ReLUHardTiled Triton Row SumMediumBlockwise Online SoftmaxHardSoftmax as a CUDA KernelMediumOnline Softmax Kernel in TritonMediumFused Row-Wise Softmax in TritonMediumFused Matmul + Bias + ReLU in TritonMediumImplement Swish (SiLU) as a CUDA KernelEasyReLU as a CUDA KernelEasyImplement Leaky ReLU as a CUDA KernelEasyImplement Sigmoid as a CUDA KernelEasy

Accepts: array

Accepts: string

You must run your code first.

Kernel performance

Submit a correct solution to see your kernel performance.

Triton Row-Wise Softmax

Activation FunctionsGPU Programming
Medium

Implement stable softmax independently across each row of a two-dimensional CUDA tensor using Triton. For input value xr,cx_{r,c}xr,c​ in row rrr and column ccc, let CCC be the number of columns and jjj index columns. The row maximum mrm_rmr​ and normalized output yr,cy_{r,c}yr,c​ are:

mr=max⁡0≤j<Cxr,j.m_r=\max_{0\le j<C}x_{r,j}.mr​=0≤j<Cmax​xr,j​. yr,c=exr,c−mr∑j=0C−1exr,j−mr.y_{r,c}=\frac{e^{x_{r,c}-m_r}}{\sum_{j=0}^{C-1}e^{x_{r,j}-m_r}}.yr,c​=∑j=0C−1​exr,j​−mr​exr,c​−mr​​.

Complete only the empty kernel body; the supplied solve launcher is already implemented. The pointers identify the input and output buffers, row_stride is the input row stride in elements, n_cols is the row width, and BLOCK_SIZE is the compile-time padded width. Return no value; write normalized rows into the contiguous output tensor with the same shape and storage dtype as the input.

Examples

Input: x = [[1, 2, 3], [3, 2, 1]], dtype = float32

Output: [[0.090031, 0.244728, 0.665241], [0.665241, 0.244728, 0.090031]]

Explanation: Reversing a row reverses its probability order.

Input: x = [[-2, 0, 1, 4, -1]], dtype = float16

Output: [[0.0023, 0.016998, 0.046204, 0.928223, 0.006256]]

Input: x = [[8], [-3]], dtype = bfloat16

Output: [[1], [1]]

Hint 1

tl.max and tl.sum reduce values along a block axis.

Hint 2

tl.load supports a masked fallback value for padded columns.

Hint 3

tl.exp evaluates elementwise exponentials.

Requirements

  • Use Triton with float32 arithmetic for normalization.
  • Normalize each row independently without modifying the input.
  • Support padded input rows and write only valid output columns.

Constraints

  • x and out are separate CUDA tensors with equal shape, device, and float32, float16, or bfloat16 storage dtype.
  • Input values are finite; input columns and the output tensor are contiguous.
  • Valid matrices have zero or more rows and 1 through 65,536 columns.
  • The supplied launcher rejects invalid rank, column stride, or width and handles zero rows.
  • The supplied launcher converts bfloat16 through temporary float32 buffers.
Try Similar Problems
Masked Triton GELU KernelEasyFused Tiled Matmul and ReLUHardTiled Triton Row SumMediumBlockwise Online SoftmaxHardSoftmax as a CUDA KernelMediumOnline Softmax Kernel in TritonMediumFused Row-Wise Softmax in TritonMediumFused Matmul + Bias + ReLU in TritonMediumImplement Swish (SiLU) as a CUDA KernelEasyReLU as a CUDA KernelEasyImplement Leaky ReLU as a CUDA KernelEasyImplement Sigmoid as a CUDA KernelEasy

Accepts: array

Accepts: string

You must run your code first.

Kernel performance

Submit a correct solution to see your kernel performance.